As integrated circuits become increasingly complex and are used in assemblies to perform increasingly complex electronic functions, the necessity of providing interconnection paths among circuits and circuit assemblies becomes increasingly a limit on design. For example, in a number of applications the traditional dual-in-line integrated circuit package (DIP) simply cannot provide an adequate number of interconnections, and it has been necessary to go to a new form of integrated circuit packaging such as a package providing a two dimensional grid of interconnect pins. Such pin grid arrays (PGA) are not only bulky but also are delicate and expensive to make.